1. Technical Field
The present invention relates to image sensor cells, and more specifically, to CMOS (complementary Metal Oxide Silicon) image sensor cells.
2. Related Art
A typical image sensor cell includes a photodiode, a reset circuit, a transfer circuit, and a sensing circuit. The photodiode is adapted for accumulating charges when being placed on the path of light. The operation of the typical image sensor cell is as follows. During a reset cycle, the photodiode is electrically coupled to a DC (direct current) voltage source via the reset circuit so that the photodiode is brought to a predetermined potential. Next, the photodiode is electrically disconnected from the DC voltage source (by disabling the reset circuit). Next, during an image capturing cycle, the photodiode is exposed to light. In response, the photodiode accumulates charges proportional to the strength of light (i.e., number of photons/cm2/second) incident on the photodiode. Next, in a readout cycle, the accumulated charges in the photodiode is transferred out of the photodiode to the sensing circuit via the transfer circuit.
Once optimized, a typical image sensor cell cannot increase its charge capacity without increasing the potential barrier between the photodiode and the transfer gate. However, when the potential barrier is increased, all the accumulated charges on the photodiode cannot be transferred through the barrier to the transfer gate. This problem is called image lag. As a result, there is a need for a new structure (and method for forming the same) which allows the transfer of essentially all accumulated charges from the photodiode to the sensing circuit for high charge capacity cells.